SAN JOSE, Calif.–(BUSINESS WIRE)–Cadence Design Systems, Inc. (NASDAQ: CDNS) today announced that
Innovium has adopted the Palladium® Z1 Enterprise Emulation
Platform and the Protium™ S1 FPGA-Based Prototyping Platform
to achieve first-pass silicon success on its high-performance, scalable,
production-ready TERALYNX™ ethernet switch for the data
center. Using both the Palladium Z1 and Protium S1 platforms, Innovium
was able to expedite verification closure and attain rapid bring-up of
its software stack, thereby significantly accelerating development of
its ethernet switch.
For more information on the Cadence Verification Suite, including the
Palladium Z1 Enterprise Emulation Platform and the Protium S1 FPGA-based
Prototyping Platform, please visit http://www.cadence.com/go/cadenceverificationsuite.
Innovium adopted the Palladium Z1 and Protium S1 platforms because of
the common, congruent flow the platforms provide and their ability to
perform early software development. Due to the common flow, Innovium’s
engineers were able to reuse significant portions of their verification
environment, which improved productivity and reduced overall time to
The Palladium Z1 emulation platform enabled Innovium to validate its
architecture, perform chip verification and tune performance early in
the verification process. Using the Protium S1 prototyping platform,
Innovium was able to quickly and effectively complete early software
development of its ethernet switch, while also completing hardware and
software performance testing. When compared to simulation, Innovium saw
a 3000X speedup with the Palladium Z1 platform and a 6000X speedup using
the Protium S1 platform.
“With the Palladium Z1 and Protium S1 platforms, we were able to
efficiently balance emulation for chip verification and architecture
validation in conjunction with prototyping for early software
development and performance testing,” said Avinash Mani, VP of
engineering at Innovium. “The platforms’ common flow allowed us to
achieve fast migration between emulation and prototyping, enabling us to
accelerate development for TERALYNX, our highly innovative
production-ready 2T to 12.8Tbps data center switch family that offers
unmatched performance, telemetry and low latency.”
The Palladium Z1 Enterprise Emulation Platform and Protium S1 FPGA-Based
Prototyping Platform are part of the Cadence Verification Suite. The
Verification Suite is comprised of best-in-class core engines,
verification fabric technologies and solutions that increase design
quality and throughput, fulfilling verification requirements for a wide
variety of applications and vertical segments. The Verification Suite
supports the Cadence System Design Enablement strategy, which enables
systems and semiconductor companies to create complete, differentiated
end products more efficiently.
Cadence enables electronic systems and semiconductor companies to create
the innovative end products that are transforming the way people live,
work and play. Cadence software, hardware and semiconductor IP are used
by customers to deliver products to market faster. The company’s System
Design Enablement strategy helps customers develop differentiated
products—from chips to boards to systems—in mobile, consumer, cloud
datacenter, automotive, aerospace, IoT, industrial and other market
segments. Cadence is listed as one of Fortune Magazine’s 100 Best
Companies to Work For. Learn more at cadence.com.
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